What you will learn:
- Weak points in the existing floor plan design process.
- How artificial intelligence can optimize this process to reduce time spent from weeks to hours.
- Potential applications of expanding the same methodology to improve different hardware design processes.
Artificial intelligence (AI) has revolutionized many markets, including manufacturing, pharmaceutical, aerospace, and more, but hardware systems are one area that has not seen any major investment or innovation in AI to date. day.
While many potential machine learning (ML) applications are possible in the end-to-end lifecycle of system-on-chip (SoC) production, this article focuses on the planning phase of the SoC lifecycle. . Needless to say, this is one of the most time-, cost-, and human-resource-intensive processes. Specifically, we will examine the effectiveness of using machine learning and optimization models to exponentially reduce investment in this SoC phase.
A semiconductor chip is made up of billions of transistors. The floor plan discusses the placement of these transistors along with other necessary components such as the clock, power rails, etc., on the chip. Their locations are optimized for smaller die size, better performance, avoiding timing violations, and easier wire routing. This crucial step in the design flow requires a gate-level netlist, constraints, technology library, synchronization library I/O information, etc., as defined in Figure 1.
However, the design of the floor plan usually takes several weeks. Machine learning can potentially complete the same task in hours. This helps bring semiconductor chips to market faster and allows engineers to focus on more complex work.
Machine learning is a type of artificial intelligence that learns various patterns and information from data and applies this learning to make accurate and insightful predictions. A variety of steps in the ML process are required for floor plan optimization.
Inputs required for the floor plan, such as gate-level netlist, constraints, technology library, and I/O information, are collected from proven silicon chips.
After data collection, the steps for training an ML model are initiated. The first step is to get data in the right format to train a model, which is called data preprocessing. It includes several steps, such as data filtering, data quality checks, data transformation, normalization and standardization, etc.
After data preparation is complete, the next step is to train an ML model. The goal is to predict the next component to be placed on the chip while optimizing power, performance, and minimum area (PPA). Reinforcement learning can be used to achieve this goal. It uses an iterative approach and rewards placements, which leads to a minimum PPA while penalizing suggestions that increase it.
Model testing and deployment
After training the model, the next step is to test the model’s performance on invisible chip blocks to validate the effectiveness of its predictions. If the results verified by the engineers are satisfactory, it is ready to be deployed. The chip block placement predictions made by these steps will be more efficient and faster than a traditional approach.
Further optimization of block placement
The process can be stopped at the previous step. However, further optimization of the overall chip block placement can be achieved using mixed integer programming (MIP) based optimization techniques. The algorithm will be defined with the aim of optimizing a floor plan generated by an ML model that further minimizes the operation of the PPA within the specified design constraints, which are defined in the data section.
The advantage of using MIP is its ability to generate optimized solutions for different scenarios. This helps considerably when scaling up the process for faster design. A step-by-step approach to this whole process is presented in Figure 2.
Reinforcement learning is a type of ML that involves taking action and learning through a trial-and-error approach. This is achieved by rewarding actions that lead to desired behaviors, while undesirable actions are penalized.
Although there are many types of reinforcement learning algorithms, a commonly used learning method is called Q-learning. (equation defined in Fig. 3). It is when an agent receives no policy (reinforcement learning policy is a mapping from observation of the current environment to a probability distribution of actions to be taken), leading to self-directed exploration of the environment.
Mixed integer programming is an optimization technique used to solve large, complex problems. It can be used to minimize or maximize an objective within defined constraints.
Example of goal definition and MIP constraints:
Using optimization techniques to overcome process bottlenecks to create an efficient system is not a foreign concept. It has been successfully applied in various industries decades ago, and its revolutionary impact is particularly visible in supply chain management, whose market size is tens of billions of dollars.
Optimizing supply chain management using AI ensures an efficient system for manufacturing, distributing and placing inventory within the supply chain at minimum costs. This became really evident during COVID when supply chains were massively affected. Companies that had embraced supply chain optimization were not only spared the ill effects of COVID, but many were even able to thrive in it. Meanwhile, companies that failed to do so suffered billions of dollars in losses and still haven’t recovered.
AI is certainly powerful, but its predictions should not be blindly accepted and should be validated by human engineers. Comments should be provided to ML models that generate an erroneous floor plan that does not meet constraints or is not optimal. However, with consistent feedback, the model improves on its own. The hardware industry should consider initial overhead.
There are many other pragmatic applications of using AI (machine learning, deep learning, etc.) to synthesize, analyze, simulate, deploy and launch effective solutions across the hardware lifecycle with potential multi-billion dollar impact. This article just scratches the surface by looking at one of those apps.
Like the software technology industry, hardware technology industry leaders should also work cohesively to realize the full potential of AI in this space. As a first step, we suggest funding dedicated research in the area of AI and hardware design to create a roadmap for innovation in the near and distant future.
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